1. Technical Field
The embodiments herein generally relate to wireless technology, and, more particularly, to control systems and methods for wireless receivers.
2. Description of the Related Art
In conventional wireless receivers, the large range of signal power at the radio frequency (RF) input often mandates the variation of front-end low noise amplifier (LNA) gain along with the baseband variable gain amplifiers (VGA). Furthermore in Digital Video Broadcasting-Handheld (DVB-H) systems, a low desired signal may be suddenly jammed with a Global System for Mobile communications transmitter-blocker (GSM TX-blocker) that could easily compress the front-end. This scenario exists along with potential signal down fades that have to be tracked and corrected by the baseband automatic gain control (AGC) servo loops. Therefore, a technique is needed to quickly detect various blocker signal levels at the LNA. A technique is also needed to apply these gain steps while minimally affecting data transmission.
RFAGC loops using wideband detectors that sense the LNA signal output power are incorporated in a silicon germanium bipolar complementary metal oxide semiconductor (SiGe BICMOS) design as described in Antoine, P. et al., “A Direct Conversion Receiver for DVB-H,” IEEE Journal of Solid-State Circuits, Vol. 40, No. 12, pp. 2536-2544, December 2005, the complete disclosure of which, in its entirety, is herein incorporated by reference. This detected output is then passed to a translinear circuit for dB-linear control of the RF front-end gain. A differential pair in the signal path soft switches signal current to/from the LNA output. In this implementation, the RFAGC and baseband AGC values are passed as chip outputs for the demodulator logic to decode and pass back.
Typically, the demodulator that accepts the baseband AGC and/or the RFAGC data takes a substantial amount of time (hundreds of Hz) to properly correct the tuner's baseband gain. Once the desired signal is deemed as being too large, there is a “takeover point” where the baseband AGC minimizes the baseband gain, and starts reducing the RF front end gain. This point is chosen to appear well below the front end's compression point, and not affect front-end linearity. While noise performance is degraded due to RF front end attenuation, the carrier signal is large enough so as not to affect the signal to noise ratio (SNR) adversely.
However, the soft switching core in the LNA signal path generally degrades the third-order intercept point (IP3) due to its non-linearity in the middle of the switch. This is disadvantageous because a dramatically bad IP3 anywhere along the switch characteristics generally means a poor front-end linearity performance of the tuner. This implies that interferer signals can jam or reduce the SNR of the desired signal. It also tends to leave the control lines susceptible to magnetic/capacitive coupling that could cause cross modulation terms. Generally, until now no clear solution in a CMOS stand-alone tuner exists that integrates the digital RFAGC along with logic that regulates information from the RFAGC loop as well as the baseband AGC loop.